SEMICONDUCTOR

UPDATE

July 2006

 

McIlvaine Company

 

China Chip Maker Tax Breaks

 

More than a year after ending a tax rebate that many foreign firms said amounted to an unfair subsidy, China is considering new preferential policies to aid development of its chip-making sector, local media reported.

 

The new policies, which may take effect by the end of the year, would come on top of current preferential tax policies already enjoyed by all foreign companies that manufacture in China, the China Securities Journal reported.

 

Under the rules being considered, foreign-invested chipmakers would get five years of tax-free status, instead of the usual two years enjoyed by other foreign-invested manufacturers. They would also get another five years of 50 percent tax reductions, the newspaper reported.  Foreign-invested chip makers would also enjoy tax credits for their research and development expenses and tax exemptions for their fixed-asset investments, the newspaper said.

 

Other major global chipmakers with major manufacturing facilities in China include industry giant Intel, Advanced Micro Devices Inc. and Europe's STMicroelectronics, which owns a factory with South Korea's Hynix Semiconductor.

 

The new policies would come two years after China caved to pressure from foreign chipmakers in 2004 and cancelled a tax rebate policy after the United States filed a complaint with the World Trade Organization.

 

Under the policy, China had given back all but 3 percent of the taxes collected from companies that made and designed chips on the mainland.  The new policies would also come amid a marked slowdown in China's chip sales as the sector starts to mature, following two decades of strong growth.

 

Semiconductor sales in China rose 12.8 percent last year to US$37 billion, with 18 percent growth expected this year, according to research house iSuppli.   While strong, both of those rates are well below break-neck growth of the past, including a 34.9 percent gain logged by the industry in 2004.

 

First-Ever Joint Venture Bare Wafer Facility Set-up by Samsung and Siltronic

 

Samsung Electronics Co and Siltronic AG, a division of Wacker Chemie AG have announced a Joint Venture company that will construct and operate a 300mm wafer manufacturing facility in Singapore with an intended capacity of 300,000, 300mm wafer production per month at a cost of US$1.0 billion.

 

The JV will be called Siltronic Samsung Wafer Pte. Ltd., and will be Siltronic's largest production facility when fully utilized. It will be located adjacent to Siltronic's existing 200mm wafer growing plant that is also Siltronic's largest 200mm production facility with over $300 million US dollars in investment. Both parties will fund the new facility equally.

 

"A ‘first' in the wafer industry, this joint venture involves the collaboration of two technology leaders in their respective fields. It is a milestone in respect to innovation, time to market and efficiency in the whole industry," commented Siltronic CEO Dr. Wilhelm Sittenthaler. "Market demand for 300 mm wafers is expected to grow by about 50 percent in 2006 and is as well expected to grow substantially during the next years. The new Singapore fab and expansion of our German fabs will help to meet strong demand, particularly in Asia, and allows us to further strengthen our market position."

 

Samsung Electronics' Board of Directors and Siltronic's Supervisory Board approved the Joint Venture Agreement on July 14, with closing of the JV expected at the end of August to coincide with groundbreaking.

 

Wacker Chemie will also enter into a long-term contract with the Joint Venture to ensure a stable supply of hyperpure polycrystalline silicon as the plant ramps to high levels starting in mid-2008. The JV is expected to reach 300,000 wafers per month and 800 employees by 2010. It is believed that Samsung committed to the new JV to ensure stable  wafer supply within close proximity to the majority of its 300mm facilities in Korea as well as meet demand from its plans to build 2 300mm fabs per year over an eight year period.

 

"Singapore is pleased to host this USD 1 billion joint venture between Samsung Electronics and Siltronic," stated Teo Ming Kian, Chairman of Singapore Economic Development Board. "This will be Singapore's first ingot-pulling and 300 mm substrate fab and is a key addition to our semiconductor industry. It also represents Siltronic's most significant expansion to date, as well as Samsung Electronic's expansion of its regional HQ to its first manufacturing investment in Singapore."

 

The news of the JV being located in Singapore will be seen as blow to efforts made by the Portland, Oregon, U.S.A regional government to attract Siltronic's next phase in wafer capacity expansion after being short-listed with Singapore last year.

 

Renesas Technology Expands Globally


 RENESAS Technology Corp. has announced that it has decided to establish a new building in Ho Chi Minh City to expand its development and design capability for its Vietnam design subsidiary, Renesas Design Viet Nam Co., Ltd (RVC).

 

With the approval for an increase in capital by the Ho Chi Minh City Export Processing Zone Authority, Renesas will start the construction of the new building once a construction permit is issued. The operations in the new building will begin in September 2007.

Renesas has been actively expanding and enhancing its global development and design operations. The company currently operates a number of facilities outside of Japan, including Beijing and Suzhou in China and one each in Ho Chi Minh City,
Vietnam; Rennes, France; Penang, Malaysia; London, United Kingdom; Dusseldorf, Germany; and San Jose, U.S.A. In addition, Renesas outsources design work to companies in India.

RVC was created in October 2004, as one of the main centres for developing sophisticated multi-function System-on-Chips (SoCs) with a high level of design capability.

Currently approximately 100 engineers work at RVC, developing and designing SoC hardware and software for mobile, automotive, and digital consumer applications.

Among the projects they have already completed is verification work on SuperH CPU cores, design of IP modules such as video I/O and USB modules, SH-Mobile product development, and the development of digital TV software.

As the business at RVC expands, Renesas has decided to construct new building to support such needs. The number of engineers at RVC is expected to increase to 500 by 2008.

In Vietnam, the company is contributing to the advancement of LSI technology and the growth of the high-tech industry in many ways. These include employment of local engineers at RVC, ongoing technical training, the establishment of semiconductor design courses at universities, and activities to provide technology education to students.

Renesas hopes to provide system solutions for a ubiquitous network society by strengthening its development and design capabilities on a global basis.

 

Toppan Photomasks Expand Shanghai Site

 

Toppan Photomasks, Inc. today announced plans to expand its Shanghai facility, adding capacity to produce photomasks used to manufacture semiconductor devices with 180nm design rules, and additional lithography and inspection capacity for 250nm-and-above products.

 

The expansion, the fourth since the company opened the facility in 1996, will add clean room space and enhanced process, inspection, and repair capabilities to supply current demand and forecasted growth in China's increasingly vital market. The factory, which has tripled its output since opening, currently produces photomasks for geometries down to 250nm. The fast-track project is expected to make the expanded clean room available in the third quarter of 2006, and to ramp additional capacity and capabilities in the fourth quarter.

 

"Building on our 10 years of success serving China's wafer fabs and fabless design companies, this expansion leverages our Shanghai employees' proven expertise and familiarity with the industry to cement our leadership in that market," said Dave Murray, president and CEO of Toppan Photomasks. "This expansion, which is prompted by our continued growth in China and our established relationships in the chip industry, also underscores our commitment to invest in capacity and capability according to customer needs."

 

Toppan Photomasks foresaw China's emergence as a major semiconductor producer 10 years ago, and built the Shanghai site in a joint venture with Shanghai Institute of Microsystem and Information Technology (SIMIT). The facility serves customers in Shanghai, Beijing, Tianjin, Shenzhen, Suzhou, Wuxi and other cities. It provides the company with unmatched familiarity with the needs of the Chinese semiconductor industry as well as the ability to link customers seamlessly with Toppan's global network of manufacturing, R&D and customer-support sites.

 

Toshiba Builds New Semiconductor Plant in Bangkradi near Bangkok

 

As of June 2006, Toshiba plans to construct a new semiconductor-producing factory in Bangkradi Industrial Estate, 35 kilometers from Bangkok.  The new facility will help boost Toshiba's capacity in back-end processing.  Construction of the new facility will commence July 2006.  This will be the first phase of construction that will span several years.  The new facility will have 86,000 sq. ft. of production area and will accommodate high-efficiency production lines. 

 

Micron Ninth Core Partner within IMEC’s (sub)-32nm Research Platform

 

IMEC, Europe's leading independent nanoelectronics and nanotechnology research institute announces that Micron Technology Inc., one of the world's largest companies focused on memory, storage and imaging semiconductor products, joined IMEC’s (sub)-32nm CMOS research platform as core partner. Micron will also participate within IMEC’s advanced Flash memory program.

 

With Micron joining IMEC’s core program, nine of the world’s leading IC manufacturers or foundries – Infineon, Intel, Matsushita/Panasonic, Micron, Philips, Samsung, STMicroelectronics, Texas Instruments and TSMC – collaborate in IMEC’s state-of-the-art 300mm research facilities to conquer the ITRS challenges for the (sub)-32nm node.

 

Recently, important milestones have been achieved within IMEC’s 300mm research facility. The installation of the back-end-of-line equipment was finished beginning July, with first full-flow lots being processed. Interconnect R&D for the 32nm node has commenced on 300mm and first results are expected early Q4 2006.

 

Elpida to Increase Production at 300mm Fab

Elpida Memory Inc., a Japanese DRAM supplier, recently resolved at its board meeting a capital expenditure plan for increasing the manufacturing capacity of its 300mm wafer facility (E300 Fab) in Hiroshima Prefecture, Japan.

 

The company shared that the purpose for the capital expenditure is twofold: to respond to the growth in demand for DRAM products used in mobile devices; and to have production capacity for 70nm-and-below process technologies.

 

The fab is divided into several areas. The fab's Area 1 started construction in February 2001 and mass production in January 2003. Its Area 2 started construction in June 2004 and mass production in October 2005. Area 3 started construction at the same time as Area 2, but production has not yet been started. Half of Area 2 includes production facilities and equipment. At present, the combined wafer processing capacity for Area 1 and Area 2 is approximately 55,000 wafers per month.

 

Elpida plans to boost the wafer processing capacity to 60,000 wafers per month. After 60,000, the company said it will consider capacity expansion of up to 100,000 wafers by the end of its 2008 fiscal year.

 

Japan's Renesas Technology Corp. to Construct a Chip-designing Center in HCMC

 

Japan's Renesas Technology Corp. just announced that it would soon spur capital to construct a chip-designing center in HCMC to expand the design capability of its chip-designing subsidiary in Vietnam.

 

Tsuneo Sato, president and CEO of the subsidiary Renesas Design Vietnam Co., Ltd (RVC), told the Daily on Wednesday that it is raising investment capital from US$13mil to US$30mil for the purpose.

 

The HCMC Export Processing Zones and Industrial Parks Authority (HEPZA) has given approval to Renesas to increase the capital this month, he said.

 

Located in Tan Thuan Export Processing Zone, the new four-story building will cover a two-hectare area and will be put into operation next September. It will replace its designing center located in a leased workshop in the zone, he added.

 

The number of engineers at RVC will increase to 500 by 2008 from nearly 100 now, Sato said, adding Vietnamese engineers are highly qualified for its projects.

 

RVC was established in October 2004 as one of main R&D centers for developing sophisticated multifunction System-on-Chip (SoC). At present engineers at RVC are developing and designing SoC hardware and software for mobile, automotive, and digital consumer applications.

 

Among the projects they have already completed are verification work on SHCPU cores, design of intellectual property (IP) modules such as video I/O and universal serial bus (USB) modules, SH-Mobile product development, and development of digital TV software.

 

RVC products will be supplied to Renesas subsidiaries worldwide to produce chips for computers, cell phones, digital cameras and audio/ video devices of big brands such as Sony, Panasonic, Canon, Cisco, Samsung, Honda, Toyota and others.

 

Renesas currently operates a number of facilities outside of Japan, including two in China and one each in HCMC, Rennes, Penang, London, Dusseldorf, and San Jose. Besides, it also out sources designing works to companies in India.

 

Founded by Hitachi and Mitsubishi Electric in April 2003, Renesas Technology Corp. is one of the world's leading semiconductor system solutions providers for mobile, automotive and PC/AV (Audio Visual) markets and the world's No.1 supplier of microcontrollers.

 

It is also a leading provider of LCD Driver ICs, Smart Cardmicrocontrollers, High Power Amplifiers, Mixed Signal ICs, SoC, and System-in-Package (SiP).

 

Technique Could Lead to Cheap, Environmentally Friendly Microchips Developed by UK Researchers

 

The team from University College London used low-temperature, ultraviolet lamps to make silicon dioxide, a vital component of almost all modern chips.
Chip manufacturers currently use energy-intensive furnaces, heated to more than 1,000C, to make the material.


The new technique operates at room temperature and so requires less power and fewer resources.


"This finding means that the industry's energy, and subsequent cost savings, could reduce the prices of electronic devices for consumers and, of course, create a positive environmental impact," said Professor Ian Boyd of UCL, a member of the team behind the discovery.


Complex designs
Microchips are composed of complex electrical circuits made of a variety of silicon components, such as transistors.


A transistor is a basic electronic switch. Every chip needs large numbers of them, sometimes hundreds of millions to function. The more there are, the more calculations they can do. These transistors are made of a combination of a conducting material, to channel the electrical charge through the device, and an insulator that inhibits the flow of electricity.


A common insulator is the oxidized form of silicon, silicon dioxide.
The compound can also be used to channel electrical charge in memory devices.
It is also often used as a "mask" that allows manufacturers to precisely pattern the chips with other elements to change the electrical properties of specific areas.


For example, phosphorous atoms are commonly added to parts of the silicon to increase

conductivity.


This process, known as "doping", allows chip-makers to change the electrical properties of specific areas of the chip to create precise pathways through which charge can flow.
These form the intricate circuits needed in modern devices.


Chip size
Silicon dioxide forms very slowly at room temperature. In order to speed up the process chip-makers heat the silicon wafers, from which chips are cut, to between 900°C and 1,200°C in the presence of oxygen. This consumes a huge amount of energy. Also, as the wafer is heated, chip components that have already been incorporated can warp and distort its structure. This is a particular problem as researchers continue to chase Moore's Law, which says the number of transistors on a chip will double every couple of years.
As manufacturers try to squeeze smaller and smaller components on to chips, they are packed closer together.


Heating the wafer with these densely packed chips can cause contamination of individual components as they become more fluid and "bleed" into one another. A low temperature manufacturing process would overcome these problems and allow chip-makers to continue to push the boundaries of chip size.


Cool temperature
The new technique uses a lamp that emits light from deep within the UV spectrum at a wavelength of 126 nanometres.


The UV lamp is about 30cm long and looks like a common fluorescent tube. It is filled

with argon gas that has a high voltage applied to it. The emitted light causes oxygen molecules to break down into separate atoms. This dissociation creates one atom with a lot of energy and one with much less.


The energetic atoms are the most useful for creating silicon dioxide.


Future products
However, the silicon industry demands pure materials to manufacture microchips.
According to Dr Douglas Paul, of the University of
Cambridge semiconductor physics group, this may be the technique's biggest stumbling block.


"There have been many people who have shown similar results but all these techniques cannot be used for electronics because the defect densities are far too high," he said.
"By growing thermal oxides at high temperatures in present microelectronics manufacturing processes (from 700°C to 1,000°C) most of the defects are all annealed out and you end up with an extremely low defect density".


Professor Boyd admits that prolonged exposure to other UV wavelengths produces defects, but points out that his technique employs a wavelength of light that has never been used before.


The next stage, he says, is to try the technique in clean-room facilities, similar to those used in chip-making plants, to prove the technology works on an industrial scale.
The team says it is already talking to companies about using the technique. The researchers believe that eventually it could be used not just in chip manufacturing but also to create circuits on other materials including cloth, for smart clothing, paper for electronic books or in plastic electronics.


"It opens the door to a whole array of technologies and possibilities," said Professor Boyd.

 

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